LPC47M140-NC SMSC [SMSC Corporation], LPC47M140-NC Datasheet - Page 6

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LPC47M140-NC

Manufacturer Part Number
LPC47M140-NC
Description
128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Table 22 – Skip Bit vs. Read Deleted Data Command...............................................................................................51
Table 23 – Result Phase Table ..................................................................................................................................52
Table 24 – Verify Command Result Phase Table ......................................................................................................53
Table 25 – Typical Values for Formatting...................................................................................................................55
Table 26 – Interrupt Identification...............................................................................................................................56
Table 27 – Drive Control Delays (ms) ........................................................................................................................57
Table 28 – Effects of WGATE and GAP Bits..............................................................................................................59
Table 29 – Addressing the Serial Port........................................................................................................................60
Table 30 – Interrupt Control Table .............................................................................................................................63
Table 31 – Baud Rates ..............................................................................................................................................68
Table 32 – Reset Function Table ...............................................................................................................................69
Table 33 – Register Summary for an Individual UART Channel ................................................................................69
Table 34 – MPU-401 HOST INTERFACE REGISTERS ............................................................................................74
Table 35 – MIDI DATA PORT ....................................................................................................................................74
Table 36 – MPU-401 STATUS PORT ........................................................................................................................74
Table 37 – MIDI RECEIVE BUFFER EMPTY STATUS BIT.......................................................................................75
Table 38 – MIDI TRANSMIT BUSY STATUS BIT ......................................................................................................75
Table 39 – MPU-401 COMMAND PORT ...................................................................................................................75
Table 40 – Parallel Port Connector ............................................................................................................................79
Table 41 – EPP Pin Descriptions ...............................................................................................................................83
Table 42 – ECP Pin Descriptions ...............................................................................................................................85
Table 43 – ECP Register Definitions..........................................................................................................................86
Table 44 – Mode Descriptions....................................................................................................................................86
Table 45a – Extended Control Register .....................................................................................................................90
Table 46 – Channel/Data Commands supported in ECP mode .................................................................................92
Table 47 – PC/AT and PS/2 Available Registers .......................................................................................................95
Table 48 – State of System Pins in Auto Powerdown ................................................................................................96
Table 49 – State of Floppy Disk Drive Interface Pins in Powerdown..........................................................................96
Table 50 – I/O Address Map ....................................................................................................................................103
Table 51 – Host Interface Flags ...............................................................................................................................103
Table 52 – Status Register.......................................................................................................................................105
Table 53 – Resets ....................................................................................................................................................105
Table 54 – General Purpose I/O Port Assignments .................................................................................................111
Table 55 – GPIO Configuration Summary................................................................................................................112
Table 56 – GPIO Read/Write Behavior ....................................................................................................................113
Table 57 – Different Modes for Fan..........................................................................................................................118
Table 58 – Runtime Register Block Summary..........................................................................................................125
Table 59 – PME, SMI, GPIO, FAN Register Description..........................................................................................127
Table 60 – Game Port..............................................................................................................................................151
Table 61 – LPC47M14x Configuration Registers Summary.....................................................................................154
Table 62 – Chip Level Registers ..............................................................................................................................156
Table 63 – Logical Device Registers........................................................................................................................159
Table 64 – Logical Device Registers........................................................................................................................160
Table 65 – I/O Base Address Configuration Register Description............................................................................161
Table 66 – Interrupt Select Configuration Register Description ...............................................................................162
Table 67 – DMA Channel Select Configuration Register Description.......................................................................163
Table 68 – Floppy Disk Controller, Logical Device 0 [Logical Device Number = 0x00] ............................................164
Table 69 – Parallel Port, Logical Device 3 [Logical Device Number = 0x03]............................................................165
Table 70 – Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]............................................................166
Table 71 – Serial Port 2, Logical Device 5 [Logical Device Number = 0x05]............................................................166
Table 72 – KYBD, Logical Device 7 [Logical Device Number = 0x07] .....................................................................168
Table 73 – PME, Logical Device A [Logical Device Number = 0x0A].......................................................................168
Table 74 – MPU-401 [Logical Device Number = 0x0B] ............................................................................................169
Table 75 – USB Hub, Logical Device C [Logical Device Number = 0x0C] ...............................................................169
Table 76 – HubControl_1 Register Definition ...........................................................................................................171
Table 77 – Electrical Source Characteristics............................................................................................................178
SMSC DS – LPC47M14X
Page 6
Rev. 03/19/2001

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