HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 143

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

5.4
5.4.1
Interrupt operations in the chip differ depending on the interrupt control mode.
NMI interrupts are accepted at all times except in the reset state and the hardware standby state. In
the case of IRQ interrupts and on-chip supporting module interrupts, an enable bit is provided for
each interrupt. Clearing an enable bit to 0 disables the corresponding interrupt request. Interrupt
sources for which the enable bits are set to 1 are controlled by the interrupt controller.
Table 5.5 shows the interrupt control modes.
The interrupt controller performs interrupt control according to the interrupt control mode set by
the INTM1 and INTM0 bits in SYSCR, the priorities set in IPR, and the masking state indicated
by the I bit in the CPU’s CCR, and bits I2 to I0 in EXR.
Table 5.5
Interrupt
Control Mode
0
—
2
—
Interrupt Operation
Interrupt Control Modes and Interrupt Operation
Interrupt Control Modes
0
1
INTM1 INTM0
SYSCR
0
1
0
1
—
—
Priority Setting
Registers
—
IPR
I
—
I2 to I0
—
Interrupt
Mask Bits
Rev.4.00 Sep. 07, 2007 Page 113 of 1210
Interrupt mask control is
performed by the I bit.
Setting prohibited
8-level interrupt mask control
is performed by bits I2 to I0.
8 priority levels can be set
with IPR.
Setting prohibited
Description
REJ09B0245-0400