HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 56
HD6412332
Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412332.pdf
(1244 pages)
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• High-speed operation
• CPU operating mode
• Power-down state
2.1.2
The differences between the H8S/2600 CPU and the H8S/2000 CPU are as shown below.
• Register configuration
• Basic instructions
• Number of execution states
Instruction
MULXU
MULXS
There are also differences in the address space, CCR and EXR functions, power-down state, etc.,
depending on the product.
Rev.4.00 Sep. 07, 2007 Page 26 of 1210
REJ09B0245-0400
⎯ All frequently-used instructions execute in one or two states
⎯ Maximum clock rate:
⎯ 8/16/32-bit register-register add/subtract: 40 ns
⎯ 8 × 8-bit register-register multiply:
⎯ 16 ÷ 8-bit register-register divide:
⎯ 16 × 16-bit register-register multiply:
⎯ 32 ÷ 16-bit register-register divide:
⎯ Advanced mode
⎯ Transition to power-down state by SLEEP instruction
⎯ CPU clock speed selection
The MAC register is supported only by the H8S/2600 CPU.
The four instructions MAC, CLRMAC, LDMAC, and STMAC are supported only by the
H8S/2600 CPU.
The number of exection states of the MULXU and MULXS instructions.
Differences between H8S/2600 CPU and H8S/2000 CPU
Mnemonic
MULXU.B Rs, Rd
MULXU.W Rs, ERd
MULXS.B Rs, Rd
MULXS.W Rs, ERd
25 MHz
480 ns
480 ns
800 ns
800 ns
H8S/2600
3
4
4
5
Internal Operation
H8S/2000
12
20
13
21
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