HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 485

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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10.2.3
Note: When TGRC or TGRD is designated for buffer operation, this setting is invalid and the
The TIOR registers are 8-bit registers that control the TGR registers. The TPU has eight TIOR
registers, two each for channels 0 and 3, and one each for channels 1, 2, 4, and 5. The TIOR
registers are initialized to H'00 by a reset and in hardware standby mode.
Care is required since TIOR is affected by the TMDR setting. The initial output specified by TIOR
is valid when the counter is stopped (the CST bit in TSTR is cleared to 0). Note also that, in PWM
mode 2, the output at the point at which the counter is cleared to 0 is specified.
Channel 0: TIOR0H
Channel 1: TIOR1
Channel 2: TIOR2
Channel 3: TIOR3H
Channel 4: TIOR4
Channel 5: TIOR5
Bit
Initial value :
R/W
Channel 0: TIOR0L
Channel 3: TIOR3L
Bit
Initial value :
R/W
register operates as a buffer register.
Timer I/O Control Registers (TIOR)
:
:
:
:
IOD3
IOB3
R/W
R/W
7
0
7
0
IOD2
IOB2
R/W
R/W
6
0
6
0
IOB1
IOD1
R/W
R/W
5
0
5
0
IOD0
IOB0
R/W
R/W
0
0
4
4
Rev.4.00 Sep. 07, 2007 Page 455 of 1210
IOC3
IOA3
R/W
R/W
3
0
3
0
IOA2
IOC2
R/W
R/W
2
0
2
0
REJ09B0245-0400
IOC1
IOA1
R/W
R/W
1
0
1
0
IOC0
IOA0
R/W
R/W
0
0
0
0

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