HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 480

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bits 4 and 3—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the input clock edge.
When the input clock is counted using both edges, the input clock period is halved (e.g. φ/4 both
edges = φ/2 rising edge). If phase counting mode is used on channels 1, 2, 4, and 5, this setting is
ignored and the phase counting mode setting has priority.
Bit 4
CKEG1
0
1
Note: Internal clock edge selection is valid when the input clock is φ/4 or slower. This setting is
Bits 2 to 0—Time Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the TCNT counter
clock. The clock source can be selected independently for each channel. Table 10.4 shows the
clock sources that can be set for each channel.
Table 10.4 TPU Clock Sources
Channel
0
1
2
3
4
5
Legend:
Blank: No setting
Rev.4.00 Sep. 07, 2007 Page 450 of 1210
REJ09B0245-0400
:
ignored if the input clock is φ/1, or when overflow/underflow of another channel is selected.
Setting
Internal Clock
φ/1
Bit 3
CKEG0
0
1
—
φ/4
φ/16 φ/64 φ/256 φ/1024 φ/4096
Description
Count at rising edge
Count at falling edge
Count at both edges
TCLKA TCLKB TCLKC TCLKD
External Clock
(Initial value)
Overflow/
Underflow
on Another
Channel