HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 432
HD6412332
Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412332.pdf
(1244 pages)
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9.12.2
Table 9.22 shows the port B register configuration.
Table 9.22 Port B Registers
Name
Port B data direction register
Port B data register
Port B register
Port B MOS pull-up control register
Note: * Lower 16 bits of the address.
Port B Data Direction Register (PBDDR)
PBDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port B. PBDDR cannot be read; if it is, an undefined value will be read.
PBDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when a transition is made to software standby
mode.
• Modes 4 and 5
• Mode 6
• Mode 7
Rev.4.00 Sep. 07, 2007 Page 402 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
The corresponding port B pins are address outputs irrespective of the value of the PBDDR bits.
Setting a PBDDR bit to 1 makes the corresponding port B pin an address output, while
clearing the bit to 0 makes the pin an input port.
Setting a PBDDR bit to 1 makes the corresponding port B pin an output port, while clearing
the bit to 0 makes the pin an input port.
Register Configuration
:
:
PB7DDR PB6DDR PB5DDR PB4DDR PB3DDR PB2DDR PB1DDR PB0DDR
W
7
0
W
6
0
Abbreviation
PBDDR
PBDR
PORTB
PBPCR
W
5
0
W
4
0
R/W
W
R/W
R
R/W
W
0
3
Initial Value
H'00
H'00
Undefined
H'00
W
2
0
W
1
0
H'FF71
Address *
H'FEBA
H'FF6A
H'FF5A
W
0
0
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