HYB39S64160AT-10 SIEMENS [Siemens Semiconductor Group], HYB39S64160AT-10 Datasheet - Page 20

• Manufacturer Part Number: HYB39S64160AT-10
• Description: 64 MBit Synchronous DRAM
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Timing Diagrams
1. Bank Activate Command Cycle
2. Burst Read Operation
3. Read Interrupted by a Read
4. Read to Write Interval
5. Burst Write Operation
6. Write and Read Interrupt
7. Burst Write & Read with Auto-Precharge
8. Burst Termination
9. AC- Parameters
10. Mode Register Set
11. Power on Sequence and Auto Refresh (CBR)
12. Clock Suspension (using CKE)
13. Power Down Mode and Clock Suspend
14. Self Refresh ( Entry and Exit )
15. Auto Refresh ( CBR )
16. Random Column Read ( Page within same Bank)
17. Random Column Write ( Page within same Bank)
Semiconductor Group
4.1 Read to Write Interval
4.2 Minimum Read to Write Interval
4.3 Non-Minimum Read to Write Interval
6.1 Write Interrupted by a Write
6.2 Write Interrupted by Read
7.1 Burst Write with Auto-Precharge
7.2 Burst Read with Auto-Precharge
8.1 Termination of a full Page Burst Write Operation
8.2 Termination of a full Page Burst Write Operation
9.1 AC Parameters for a Write Timing
9.2 AC Parameters for a Read Timing
12. 1 Clock Suspension During Burst Read CAS Latency = 2
12. 2 Clock Suspension During Burst Read CAS Latency = 3
12. 3 Clock Suspension During Burst Write CAS Latency = 2
12. 4 Clock Suspension During Burst Write CAS Latency = 3
16.1 CAS Latency = 2
16.2 CAS Latency = 3
17.1 CAS Latency = 2
17.2 CAS Latency = 3
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64MBit Synchronous DRAM
HYB39S64400/800/160AT(L)