R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 119

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

5.1
5.1.1
Exception handling is started by sources, such as resets, address errors, bus errors, register bank
errors, interrupts, and instructions. Table 5.1 shows their priorities. When several exception
handling sources occur at once, they are processed according to the priority shown.
Table 5.1
Type
Reset
Address
error
Bus error
Instructions FPU exception
Register
bank error
Interrupts
Overview
Types of Exception Handling and Priority
Types of Exception Handling and Priority Order
Exception Handling
Power-on reset
Manual reset
CPU address error
Bus error
Integer division exception (division by zero)
Integer division exception (overflow)
Bank underflow
Bank overflow
NMI
User break
H-UDI
IRQ
PINT
Section 5 Exception Handling
Rev. 2.00 Sep. 07, 2007 Page 91 of 1164
Section 5 Exception Handling
REJ09B0321-0200
Priority
High
Low