R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 473

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
5
4
3
2
1
0
Bit Name
N
P
FB
WF
VF
UF
Initial
value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reverse Phase Output (N) Control
This bit selects whether the level output or the reset-
synchronized PWM/complementary PWM output while
the reverse pins (TIOC3D, TIOC4C, and TIOC4D) are
output.
0: Level output
1: Reset synchronized PWM/complementary PWM
Positive Phase Output (P) Control
This bit selects whether the level output or the reset-
synchronized PWM/complementary PWM output while
the positive pin (TIOC3B, TIOC4A, and TIOC4B) are
output.
0: Level output
1: Reset synchronized PWM/complementary PWM
External Feedback Signal Enable
This bit selects whether the switching of the output of
the positive/reverse phase is carried out automatically
with the MTU2/channel 0 TGRA, TGRB, TGRC input
capture signals or by writing 0 or 1 to bits 2 to 0 in
TGCR.
0: Output switching is external input (Input sources are
1: Output switching is carried out by software (TGCR's
Output Phase Switch 2 to 0
These bits set the positive phase/negative phase output
phase on or off state. The setting of these bits is valid
only when the FB bit in this register is set to 1. In this
case, the setting of bits 2 to 0 is a substitute for external
input. See table 12.39.
output
output
channel 0 TGRA, TGRB, TGRC input capture signal)
UF, VF, WF settings).
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Sep. 07, 2007 Page 445 of 1164
REJ09B0321-0200