GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 106
GS4910B
Manufacturer Part Number
GS4910B
Description
HD/SD/Graphics Clock and Timing Generator with GENLOCK
Manufacturer
GENNUM [Gennum Corporation]
Datasheet
1.GS4910B.pdf
(113 pages)
- Current page: 106 of 113
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3.14 Device Power-Up
3.14.1 Power Supply Sequencing
3.15 Device Reset
Figure 3-20: System JTAG
The GS4911B/GS4910B has a recommended power supply sequence. To ensure
correct power-up, the ANALOG_VDD and CORE_VDD power pins should be
powered before IO_VDD.
Device pins may be driven prior to power-up without causing damage.
In order to initialize operating conditions to their default states, the application layer
must hold the RESET signal LOW during power up and for a minimum of 500us
after the last supply has reached its operating voltage.
36655 - 2
Tri-State
Application HOST
April 2006
GS4911B/GS4910B Data Sheet
In-circuit ATE probe
SDIN_TDI
SCLK_TCLK
CS_TMS
SDOUT_TDO
JTAG/HOST
GS4911B/GS4910B
106 of 113
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