GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 54

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

3.6.2 Manual Locking Process
3.6.2.1 Programming the Internal Video Genlock Block and Output Line/Frame Reset Registers
Using the host interface, the GS4911B/GS4910B may be manually programmed to
genlock certain video formats and audio clocks that are not automatically
genlocked by the device. The following sections discuss when the user should
manually program the internal video and/or audio genlock block, and how these
blocks are programmed.
The user will be required to manually program the internal video genlock block and
output line/frame reset registers during any of the following situations:
1. The pre-programmed output format and input reference cannot be
2. A custom video clock is programmed in the host interface
3. VID_STD[5:0] = 62 and a custom H-based timing output signal is programmed
4. VID_STD[5:0] = 62 and a custom reference pulse is applied to HSYNC (see
Video Genlock Block Host Registers
A simplified version of the GS4911B/GS4910B’s internal video genlock block is
shown in
HSYNC
Figure 3-6: Internal Video Genlock Block
To genlock the output clock and video timing signals to the input format, the user
must first lock the frequency of the output video clock (f
reference pulse on HSYNC (f
integers (H_Feedback_Divide, H_Reference_Divide) in the equation:
36655 - 2
------------------------------------------------- -
H_Reference_Divide
(
H_Feedback_Divide
f
Href
automatically genlocked according to the cross-reference genlock table
(Table 3-4
page
(see
Section 3.10.1 on page
(
Section 3.10 on page
72).
Figure
Internal Video Genlock Block
(host address 2Ah - 2Bh)
H_Reference_Divide
April 2006
in
3-6.
Section 3.6.1 on page
=
---------- -
f
f
Href
out
74).
Href
74).
(host address 28h - 29h)
). This is accomplished by programming the set of
H_Feedback_Divide
Comparator
Phase
50).
GS4911B/GS4910B Data Sheet
Synthesizer
27MHz
Clock
out
) to the frequency of the
(Section 3.9.1 on
Output Video
Clock
( (
f
out
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