GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 11

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GS4910B

Manufacturer Part Number
GS4910B
Description
HD/SD/Graphics Clock and Timing Generator with GENLOCK
Manufacturer
GENNUM [Gennum Corporation]
Datasheet
Table 1-1: Pin Descriptions (Continued)
Pin
Number
12
13
14
15
16
17
Name
ANALOG_GND
AUD_PLL_GND
(GS4911B only)
ANALOG_GND
(GS4910B only)
AUD_PLL_VDD
(GS4911B only)
ANALOG_GND
(GS4910B only)
10FID
HSYNC
VSYNC
Timing
Non
Synchronous
Non
Synchronous
Non
Synchronous
36655 - 2
April 2006
Type
Power
Supply
Power
Supply
Power
Supply
Power
Supply
Power
Supply
Input
Input
Input
Description
Ground connection for the analog input block. Connect to GND.
Ground connection for the audio clock synthesis internal block. Connect
to GND.
Ground connection for the analog input block. Connect to GND.
Most positive power supply connection for the audio clock synthesis
internal block. Connect to +1.8V DC.
Ground connection for the analog input block. Connect to GND.
REFERENCE SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The 10FID external reference signal is applied to this pin by the
application layer. 10FID defines the field in which the video and audio
clock phase relationship is defined according to SMPTE 318-M. It is also
used to define a 3:2 video cadence.
NOTE: If the input reference format does not include a 10 Field ID signal,
this pin should be held LOW. See
REFERENCE SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The HSYNC external reference signal is applied to this pin by the
application layer. When the GS4911B/GS4910B is operating in Genlock
mode, the device senses the polarity of the HSYNC input automatically,
and references to the leading edge.
If the user wishes to select one of the pre-programmed video and/or
timing output signals provided by the device, then this signal must
adhere to one of the 36 defined video or 16 different graphics display
standards supported by the device. In this mode of operation, the
HSYNC input provides a horizontal scanning reference signal.
The HSYNC signal may have analog timing, such as from a sync
separator, or may be digital such as from an SDI deserializer.
on page 20
recognized by the GS4911B/GS4910B.
REFERENCE SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The VSYNC external reference signal is applied to this pin by the
application layer. When the GS4911B/GS4910B is operating in Genlock
mode, the device senses the polarity of the VSYNC input automatically,
and references to the leading edge.
If the user wishes to select one of the pre-programmed video and/or
timing output signals provided by the device, then this signal must
adhere to one of the 36 defined video or 16 different graphics display
standards supported by the device. In this mode of operation, the
VSYNC input provides a vertical scanning reference signal.
The VSYNC signal may have analog timing, such as from a sync
separator, or may be digital such as from an SDI deserializer.
on page 20
recognized by the GS4911B/GS4910B.
describes the 36 video formats and 16 graphic formats
describes the 36 video formats and 16 graphic formats
GS4911B/GS4910B Data Sheet
Section 3.4.2 on page
44.
Section 1.4
Section 1.4
11 of 113

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