FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 147

• Manufacturer Part Number: FDC37B78X
• Description: Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
• Manufacturer: SMSC Corporation

The IRQF bit in Register C is a "1" whenever the
IRQB port is being driven low.
Frequency Divider
The RTC has 22 binary divider stages following
the clock input. The output of the divider is a 1
Hz
logic. The
divider bits (DV3-DV0) in Register A. As shown
in Table 66 the divider control bits can select the
operating mode, or be used to hold the divider
chain reset which allows precision setting of the
time. When the divider chain is changed from
signal
divider is controlled by the three
to
the
update-cycle
147
reset to the operating mode, the first update
cycle is one-half second later. The divider
control bits are also used to facilitate testing of
the RTC.
Periodic Interrupt Selection
The periodic interrupt allows the IRQB port to be
triggered from once every 500 ms to once every
122.07
interrupt is selected with the RS0-RS3 bits in
Register A. The periodic interrupt is enabled
with the PIE bit in Register B.
s. As Table 67 shows, the periodic