FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 252

no-image

FDC37B78X

Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
Note 1 Maximum value only applies if there is room in the FIFO and terminal count has not been
Note 2 nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130
NAME
PDATA<7:0>
t1
t2
t3
t4
t5
t6
nAUTOFD
nACK
received. ECP can stall by keeping nAUTOFD low.
ns.
PDATA Valid to nACK Asserted
nAUTOFD Deasserted to PDATA Changed
nACK Asserted to nAUTOFD Deasserted
(Notes 1,2)
nACK Deasserted to nAUTOFD Asserted (Note 2)
nAUTOFD Asserted to nACK Asserted
nAUTOFD Deasserted to nACK Deasserted
TABLE 108 - ECP PARALLEL PORT REVERSE TIMING
FIGURE 29 - ECP PARALLEL PORT REVERSE TIMING
DESCRIPTION
t4
t1
t5
253
t3
t6
MIN
80
80
0
0
0
0
t4
TYP
t2
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns

Related parts for FDC37B78X