FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 178

• Manufacturer Part Number: FDC37B78X
• Description: Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
• Manufacturer: SMSC Corporation

OSC
Default = 0x04,
on Vcc POR or
Reset_Drv
hardware
signal.
Chip Level
Vendor Defined
Configuration
Address Byte 0
Default=0xF0
(Sysopt=0)
=0x70
(Sysopt=1)
on Vcc POR or
Reset_Drv
Configuration
Address Byte 1
Default = 0x03
on Vcc POR or
Reset_Drv
Chip Level
Vendor Defined
TEST 4
TEST 5
TEST 1
TEST 2
REGISTER
0x28 -0x2A
ADDRESS
0x2C R/W
0x2D R/W
0x2B R/W
0x2E R/W
0x24 R/W
0x25
0x26
0x27
Bit[0] Reserved
Bit [1] PLL Control
= 0 PLL is on (backward Compatible)
= 1 PLL is off
Bits[3:2] OSC
= 01 Osc is on, BRG clock is on.
= 10 Same as above (01) case.
= 00 Osc is on, BRG Clock Enabled.
= 11 Osc is off, BRG clock is disabled.
Bit [6:4] Reserved, set to zero
Bit[7] IRQ8 Polarity
= 0 IRQ8 is active high
= 1 IRQ8 is active low
Reserved - Writes are ignored, reads return 0.
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
See Note 1 Below
Bit[7:0] Configuration Address Bits [15:8]
See Note 1 Below
Reserved - Writes are ignored, reads return 0.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
178
DESCRIPTION
STATE
C
C
C
C
C
C
C