FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 86

• Manufacturer Part Number: FDC37B78X
• Description: Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
• Manufacturer: SMSC Corporation

nRING pin, which is an alternate function on
GP11 and GP62.
This feature is enabled onto the nRING pin or
one of the ring indicator pins (nRI1, nRI2) via
the Ring Filter Select Register defined below. If
enabled, a frequency detection filter is placed in
the path to the soft power management block,
SMI and PME interface that generates an active
low pulse for the duration of a signal that
produces 3 edges in a 200msec time period i.e.,
detects a pulse train of frequency 15Hz or
higher.
This filter circuit runs off of the 32 Khz clock.
This circuit is powered by the VTR power
supply. When this circuit is disabled, it will draw
no current.
The nRING function is part of the soft power
management block as an additional wakeup
event, and the SMI and PME interface logic.
1. A status and enable bit is in the soft power
status and enable registers as follows:
RING Status bit - R/W: RING_STS, Bit 3 of
Soft Power Status Register 2 (Logical
Device 8, 0xB3); latched, cleared on read.
1= Ring indicator input occurred on the
nRING pin and, if enabled, caused the
wakeup (activated nPowerOn). 0= nRING
input did not occur.
RING Enable bit - R/W: RING_EN, Bit 3 of
Soft Power Enable Register 2 (Logical
Device 8, 0xB1). 1=Enable ring indication
n R I N G
R i n g W a k e u p F i l t e r O u t p u t
RING WAKEUP FILTER OUTPUT
86
2. An enable bit is in the SMI Enable Register 1
as follows:
3. A status and enable bit is in the PME status
and enable registers as follows:
Refer
programming information
The ring wakeup filter will produce an active low
pulse for the period of time that nRING, nRI1
and/or nRI2 is toggling. See figure below.
on nRING pin as wakeup function to
activate nPowerOn. 0=Disable.
RING Enable bit - R/W: RING_EN, Bit 0 of
SMI Register 1 (System I/O Space, at
<PM1_BLK>+14h).
indication on nRING pin as SMI function.
0=Disable.
RING is used as the SMI status bit for
RING (see PME Status Register).
RING Status bit - R/W: RING_STS, Bit 5 of
PME Status Register 1 (System I/O Space,
at <PM1_BLK>+Ch); latched, cleared by
writing a “1” to this bit. 1= Ring indicator
input occurred on the nRING pin and, if
enabled, caused the nPME/SCI or SMI. 0=
nRING input did not occur.
RING Enable bit - R/W: RING_EN, Bit 5 of
PME Enable Register 1 (System I/O Space,
at
indication on nRING pin as PME wakeup
function. 0=Disable.
to
<PM1_BLK>+Eh).
Logical
Note: the PME status bit for
Device
1=Enable
1=Enable
8,
0xC6
ring
ring
for