FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 175

• Manufacturer Part Number: FDC37B78X
• Description: Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
• Manufacturer: SMSC Corporation

INDEX
0x61
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xEF
0xFA
0xF0
0xF1
0xF2
0xF3
0xF4
0xF6
0xF9
0x60,
Notes
0)
1)
2)
3)
4)
0x30
0x70
0xF0
(2)
CR22 Bit 5 is reset on Vtr POR only
This register contains some bits which are read or write only.
Register 60 is the high byte; 61 is the low byte. For example to set the primary base address to
1234h, write 12h into 60, and 34h into 61.
These configuration registers are powered by Vtr and battery backed up.
The Activate bit for Logical Device A does not effect the generation of an interrupt (SCI).
R/W
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(1)
RESET
HARD
0x00,
0x00
0x00
0x00
0x00
0x00
0x00
LOGICAL DEVICE A CONFIGURATION REGISTERS (ACPI)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Vcc POR
0x00,
0x00
0x00
0x00
0x00
0x00
0x00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Vtr POR
175
0x00,
0x00
0x00
0x00
0x00
0x00
0x00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Vbat
POR
0x01
0x01
0x01
0x01
0x00
0x01
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
-
-
-
-
-
-
RESET
SOFT
0x00,
0x00
0x00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
GP11
GP12
GP13
GP14
GP15
GP16
GP17
GP_INT2
GP_INT1
WDT_UNITS
WDT_VAL
WDT_CFG
WDT_CTRL
GP1
GP5
GP6
Activate
Primary Base I/O
Address
PM1_BLK
Primary Interrupt Select
Sleep/Wake
Configuration
CONFIGURATION
3
3
3
3
3
3
3
3
3
3
REGISTER
4
3
3
3
3