XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 115

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

8.4 Analog Control Register
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Address:
The analog control register (ACR) controls the power-up, interrupt, and
flag operation. The analog subsystem draws current while it is operating.
The resulting power consumption can be reduced by powering down the
analog subsystem when not in use (refer to
Characteristics (V
three enable bits (ISEN, CP1EN, and CP2EN) in the ACR at $001D.
Since these bits are cleared following a reset, the voltage comparators
and the charge current source will be powered down following a reset of
the device.
The control bits in the ACR are shown in
register are cleared by a reset of the device.
CHG
Reset:
Read:
Write:
The CHG enable bit allows direct control of the charge current source
and the discharge device and also reflects the state of the discharge
device. This bit is cleared by a reset of the device.
1 = If the ISEN bit is also set, the charge current source is sourcing
0 = The discharge device is sinking current into the PB0/AN0 pin.
$001D
CHG
Bit 7
current out of the PB0/AN0 pin. Writing a logic 1 enables the
charging current out of the PB0/AN0 pin.
Writing a logic 0 disables the charging current and enables the
discharging current into the PB0/AN0 pin, if the ISEN bit is also
set.
0
Figure 8-5. Analog Control Register (ACR)
Analog Subsystem
ATD2
6
0
DD
= 4.5 to 5.5
ATD1
5
0
ICEN
4
0
Vdc)). This can be done by clearing
CPIE
Figure
3
0
15.6 Supply Current
CP2EN
8-5. All the bits in this
2
0
Analog Control Register
Advance Information
Analog Subsystem
CP1EN
1
0
ISEN
Bit 0
0
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