XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 88

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Parallel Input/Output
7.3.4 Port A External Interrupts
Advance Information
88
NOTE:
PDIA5–PDIA0 — Port A Pulldown Inhibit Bits
The PIRQ bit in the MOR enables the PA3–PA0 pins to serve as external
interrupt pins in addition to the IRQ/V
the PA3–PA0 pins is a logic 1 or a rising edge. A state of the PIRQ bit in
the MOR determines whether external interrupt inputs are
edge-sensitive only or both edge- and level-sensitive. Port A interrupts
are also interactive with each other and the IRQ/V
4.6 External
When testing for external interrupts, the BIH and BIL instructions test the
voltage on the IRQ/V
Therefore, BIH and BIL cannot test the port A external interrupt pins.
Writing to these write-only bits controls the port A pulldown devices.
Reading these pulldown register A bits returns undefined data. Reset
clears bits PDIA5–PDIA0.
0 = Lower four port C pins pulldown devices turned on if pin has
1 = Corresponding port A pin pulldown device turned off
0 = Corresponding port A pin pulldown device turned on if pin has
been programmed by the DDRC to be an input
been programmed by the DDRA to be an input
Interrupts.
Parallel Input/Output
PP
pin, not the state of the internal IRQ signal.
MC68HC705JJ7 • MC68HC705JP7 — REV 4
PP
pin. The active interrupt state for
PP
pin as described in
MOTOROLA