XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 117

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XC68HC705JJ7

Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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MC68HC705JJ7 • MC68HC705JP7 — REV 4
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NOTE:
NOTE:
For the input capture to occur when the output of comparator 2 goes
high, the IEDG bit in the TCR must also be set.
When the ICEN bit is set, the input capture function of the programmable
timer is not connected to the PB3/AN3/TCAP pin but is driven by the
CPF2 output flag from comparator 2. To return to capturing times from
external events, the ICEN bit must first be cleared before the timed event
occurs.
CPIE
If both the ICEN and CPIE bits are set, they will both generate an
interrupt by different paths. One will be the programmable timer interrupt
due to the input capture and the other will be the analog interrupt due to
the output of comparator 2 going high. In this case, the input capture
interrupt will be entered first due to its higher priority. The analog
interrupt will then need to be serviced even if the comparator 2 output
has been reset or the input capture flag (ICF) has been cleared.
CP2EN
16-bit buffer located at $0014 and $0015. This bit is automatically set
whenever mode 2 or 3 is selected by setting the ATD2 control bit. This
bit is cleared by a reset of the device.
This is a read/write bit that enables an analog interrupt when either of
the CPF1 or CPF2 flag bits is set to a logic 1. This bit is cleared by a
reset of the device.
The CP2EN enable bit controls power to voltage comparator 2 in the
analog subsystem. Powering down a comparator will drop the supply
current. This bit is cleared by a reset of the device.
1 = Connects the CPF2 flag bit to the timer input capture register
0 = Connects the PB3/AN3 pin to the timer input capture register
1 = Enables analog interrupts when comparator flag bits are set
0 = Disables analog interrupts when comparator flag bits are set
1 = Writing a logic 1 powers up voltage comparator 2.
0 = Writing a logic 0 powers down voltage comparator 2.
Analog Subsystem
Analog Control Register
Advance Information
Analog Subsystem
117

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