XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 207

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

14.6 Opcode Map
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
TAX
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TXA
WAIT
A
C
CCR Condition code register
dd
dd rr Direct address of operand and relative offset of branch instruction
DIR
ee ff
EXT
ff
H
hh ll
I
ii
IMM
INH
IX
IX1
IX2
M
N
n
Source
Form
Accumulator
Carry/borrow flag
Direct address of operand
Direct addressing mode
High and low bytes of offset in indexed, 16-bit offset addressing
Extended addressing mode
Offset byte in indexed, 8-bit offset addressing
Half-carry flag
High and low bytes of operand address in extended addressing
Interrupt mask
Immediate operand byte
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Memory location
Negative flag
Any bit
Transfer
Accumulator to Index
Register
Test Memory Byte for
Negative or Zero
Transfer Index
Register to
Accumulator
Stop CPU Clock and
Enable
Interrupts
Operation
Table 14-6. Instruction Set Summary (Sheet 7 of 7)
See
Table
14-7.
Description
Instruction Set
(M) – $00
X
A
(A)
(X)
opr
PC
PCH Program counter high byte
PCL
REL
rel
rr
SP
X
Z
#
( )
–( )
?
:

—
— — — — —
— — — — —
— — — — —
—  — — —
H I N Z C
on CCR
Effect
Operand (one or two bytes)
Program counter
Program counter low byte
Relative addressing mode
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
Index register
Zero flag
Immediate value
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Loaded with
If
Concatenated with
Set or cleared
Not affected
INH
DIR
INH
INH
INH
INH
IX1
IX
Advance Information
3D
4D
5D
6D
7D
9F
8F
97
Instruction Set
Opcode Map
dd
ff
207
2
4
3
3
5
4
2
2