S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 103
S71GS128NB0
Manufacturer Part Number
S71GS128NB0
Description
128N based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71GS128NB0.pdf
(195 pages)
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CellularRAM Type 2
128/64/32 Megabit
Burst CellularRAM
Features
General Description
October 4, 2004 cellRAM_00_A0
Single device supports asynchronous, page, and burst operations
VCC Voltages
— 1.70V–1.95V V
Random Access Time: 70ns
Burst Mode Write Access
— Continuous burst
Burst Mode Read Access
— 4, 8, or 16 words, or continuous burst
Page Mode Read Access
— Sixteen-word page size
— Interpage read access: 70ns
— Intrapage read access: 20ns
Low Power Consumption
— Asynchronous READ < 25mA
— Intrapage READ < 15mA
— Initial access, burst READ < 35mA
— Continuous burst READ < 11mA
— Standby: 180µA
— Deep power-down < 10µA
Low-Power Features
— Temperature Compensated Refresh (TCR) On-chip sensor control
— Partial Array Refresh (PAR)
— Deep Power-Down (DPD) Mode
CellularRAM™ products are high-speed, CMOS dynamic random access memories
developed for low-power, portable applications. These devices include an industry
standard burst mode Flash interface that dramatically increases read/write band-
width compared with other low-power SRAM or Pseudo SRAM offerings.
To operate smoothly on a burst Flash bus, CellularRAM products incorporate a
transparent self-refresh mechanism. The hidden refresh requires no additional
support from the system memory controller and has no significant impact on de-
vice read/write performance.
Two user-accessible control registers define device operation. The bus configura-
tion register (BCR) defines how the CellularRAM device interacts with the system
memory bus and is nearly identical to its counterpart on burst mode Flash de-
vices. The refresh configuration register (RCR) is used to control how refresh is
performed on the DRAM array. These registers are automatically loaded with de-
fault settings during power-up and can be updated anytime during normal
operation.
Special attention has been focused on standby current consumption during self
refresh. CellularRAM products include three mechanisms to minimize standby
current. Partial array refresh (PAR) enables the system to limit refresh to only
CC
A d v a n c e
I n f o r m a t i o n
CellularRAM Type 2
103
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