S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 124
S71GS128NB0
Manufacturer Part Number
S71GS128NB0
Description
128N based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71GS128NB0.pdf
(195 pages)
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RCR[2]
RCR[2]
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
RCR[1]
RCR[1]
Deep Power-Down (RCR[4]): Default = DPD Disabled
The deep power-down bit enables and disables all refresh-related activity. This
mode is used if the system does not require the storage provided by the Cellular-
RAM device. Any stored data will become corrupted when DPD is enabled. When
refresh activity has been re-enabled, the CellularRAM device will require 150µs
to perform an initialization procedure before normal operations can resume.
Deep power-down is enabled when RCR[4] = 0, and remains enabled until
RCR[4] is set to “1.”
Temperature Compensated Refresh (RCR[6:5]): Default = +85ºC
Operation
The TCR bits allow for adequate refresh at four different temperature thresholds
(+15ºC, +45ºC, +70ºC, and +85ºC). The setting selected must be for a temper-
ature higher than the case temperature of the CellurlarRAM device. If the case
temperature is +50ºC, the system can minimize self refresh current consumption
by selecting the +70ºC setting. The +15ºC and +45ºC settings would result in
inadequate refreshing and cause data corruption.
Page Mode Operation (RCR[7]): Default = Disabled
The page mode operation bit determines whether page mode is enabled for asyn-
chronous READ operations. In the power-up default state, page mode is disabled.
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
RCR[0]
RCR[0]
Table 24. 64Mb Address Patterns for PAR (RCR[4] = 1)
Table 25. 32Mb Address Patterns for PAR (RCR[4] = 1)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
One-quarter of die
One-quarter of die
One-quarter of die
One-quarter of die
ACTIVE SECTION
ACTIVE SECTION
One-eighth of die
One-eighth of die
One-eighth of die
One-eighth of die
One-half of die
One-half of die
One-half of die
One-half of die
None of die
None of die
Full die
Full die
A d v a n c e
CellularRAM Type 2
I n f o r m a t i o n
000000h–3FFFFFh
000000h–2FFFFFh
000000h–1FFFFFh
000000h–0FFFFFh
100000h–3FFFFFh
200000h–3FFFFFh
300000h–3FFFFFh
000000h–1FFFFFh
000000h–17FFFFh
000000h–07FFFFh
080000h–1FFFFFh
180000h–1FFFFFh
000000h–0FFFFFh
100000h–1FFFFFh
ADDRESS SPACE
ADDRESS SPACE
0
0
1.5 Meg x 16
1.5 Meg x 16
4 Meg x 16
3 Meg x 16
2 Meg x 16
1 Meg x 16
0 Meg x 16
3 Meg x 16
2 Meg x 16
1 Meg x 16
2 Meg x 16
1 Meg x 16
0 Meg x 16
1 Meg x 16
512K x 16
512K x 16
SIZE
SIZE
cellRAM_00_A0 October 4, 2004
DENSITY
DENSITY
64Mb
48Mb
32Mb
16Mb
48Mb
32Mb
16Mb
32Mb
24Mb
16Mb
24Mb
16Mb
0Mb
8Mb
0Mb
8Mb
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