BT848 ETC, BT848 Datasheet - Page 100
BT848
Manufacturer Part Number
BT848
Description
Single-Chip Video Capture for PCI
Manufacturer
ETC
Datasheet
1.BT848.pdf
(141 pages)
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C
Local Registers
90
ONTROL
R
EGISTER
D
EFINITIONS
Local Registers
Bt848’s local registers reside in the 4KB memory addressed space. All of the reg-
isters correspond to dwords or a subset thereof. The local registers may be written
to or read through the PCI bus at any time. Internal addressing of the Bt848 local
registers occurs via AD[11:2] and the byte enable bits of the PCI bus. The 8-bit
byte-address for each of the following register locations is {AD[11:2], 0x00}. Any
register may be written or read by any combination of the byte enables.
PCI byte lane 0 (AD[7:0]) only. If the upper byte lanes are enabled for reading, the
data returned is zero. Thus each register is separated by a byte address offset of
four. All non-used addresses are reserved locations and return an undefined value.
size/scaled images for preview and capture applications. All registers that affect
scaling, translation, and capture on the input side of the FIFO provide for even and
odd field values that switch automatically on the internal FIELD signal.
NOTE:
The data to/from the video decoder/scaler registers and VDFC will come from
The scaling function needs to be controlled on a field basis to allow for different
Pins with alternate definitions on the Bt848A/849A are indicated by
shading.
L848A_A
Single-Chip Video Capture for PCI
Bt848/848A/849A
Brooktree
®
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