S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 103

• Manufacturer Part Number: S9S12P64J0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

2.4.2.8
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
2.4.2.9
If the pin is used as an interrupt input this register holds the interrupt flag after a valid pin event.
2.4.2.10
This register allows software re-configuration of the pinouts of the different package options for specific
peripherals:
2.4.3
2.4.3.1
The BKGD pin is associated with the BDM module.
During reset, the BKGD pin is used as MODC input.
2.4.3.2
Port A pins PA[7:0] and Port B pins PB[7:0] can be used for general purpose I/O.
2.4.3.3
Port E is associated with the free-running clock outputs ECLK, ECLKX2 and interrupt inputs IRQ and
XIRQ.
Port E pins PE[6:5,3:2] can be used for either general purpose I/O or with the alternative functions.
Port E pin PE[7] an be used for either general purpose I/O or as the free-running clock ECLKX2 output
running at the core clock rate.
Port E pin PE[4] an be used for either general purpose I/O or as the free-running clock ECLK output
running at the bus clock rate or at the programmed divided clock rate.
Port E pin PE[1] can be used for either general purpose input or as the level- or falling edge-sensitive IRQ
interrupt input. IRQ will be enabled by setting the IRQEN configuration bit (2.3.14/2-70) and clearing the
I-bit in the CPU condition code register. It is inhibited at reset so this pin is initially configured as a simple
input with a pull-up.
Freescale Semiconductor
•
PTTRR supports the re-routing of the PWM channels to alternative ports
Pins and Ports
Interrupt enable register (PIEx)
Interrupt flag register (PIFx)
Module routing register (PTTRR)
BKGD pin
Port A, B
Port E
Please refer to the device pinout section to determine the pin availability in
the different package options.
S12P-Family Reference Manual, Rev. 1.13
NOTE
Port Integration Module (S12PPIMV1)
103