S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 521
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
S9S12P64J0CFT
Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of S9S12P64J0CFT
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
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A.3.1.13
The maximum set field margin level time is given by:
A.3.1.14
The time required to Erase Verify D-Flash for a given number of words N
A.3.1.15
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases: 1,2,3,4 words and 4 words across a row boundary.
The typical D-Flash programming time is given by the following equation, where N
of words; BC=0 if no row boundary is crossed and BC=1 if a row boundary is crossed:
The maximum D-Flash programming time is given by:
A.3.1.16
Typical D-Flash sector erase times, expected on a new device where no margin verify fails occur, is given
by:
Maximum D-Flash sector erase times is given by:
Freescale Semiconductor
t
t
=
t
dcheck
t
dera
dera
350
≈
≈
≈
t
t
⋅
5025
20100
dpgm
dpgm
-------------------- -
f
(
NVMBUS
Set Field Margin Level (FCMD=0x0E)
Erase Verify D-Flash Section (FCMD=0x10)
Program D-Flash (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
450
1
⋅
≈
≈
+
------------------ -
f
⋅
⎛
⎝
⎛
⎝
NVMOP
------------------ -
f
N
(
(
NVMOP
14
14
1
W
1
)
+
+
⋅
(
(
-------------------- -
f
+
54 N
54 N
NVMBUS
+
700
⋅
⋅
3400
1
⋅
W
W
-------------------- -
f
)
)
NVMBUS
⋅
+
+
-------------------- -
f
NVMBUS
1
S12P-Family Reference Manual, Rev. 1.13
(
(
14 BC
14 BC
1
⋅
⋅
) )
) )
⋅
⋅
------------------ -
f
------------------ -
f
NVMOP
NVMOP
1
1
⎞
⎠
⎞
⎠
+
+
⎛
⎝
⎛
⎝
(
(
500
500
+
+
(
(
525 N
750
⋅
⋅
N
W
W
)
)
+
+
W
(
(
100 BC
100 BC
is given by:
⋅
⋅
)
)
W
)
)
⋅
⋅
Electrical Characteristics
denotes the number
-------------------- -
f
-------------------- -
f
NVMBUS
NVMBUS
1
1
⎞
⎠
⎞
⎠
521
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