S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 499

• Manufacturer Part Number: S9S12P64J0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

The pulse accumulator counter register reflect the number of pulses from the divided-by-64 clock since the
last reset.
14.5
The reset state of each individual bit is listed within
which details the registers and their bit fields.
14.6
This section describes interrupts originated by the TIM16B8CV2 block.
generated by the TIM16B8CV2 to communicate with the MCU.
The TIM16B8CV2 uses a total of 11 interrupt vectors. The interrupt vector offsets and interrupt numbers
are chip dependent.
14.6.1
This active high outputs will be asserted by the module to request a timer channel 7 – 0 interrupt to be
serviced by the system controller.
14.6.2
This active high output will be asserted by the module to request a timer pulse accumulator input interrupt
to be serviced by the system controller.
14.6.3
This active high output will be asserted by the module to request a timer pulse accumulator overflow
interrupt to be serviced by the system controller.
Freescale Semiconductor
1. Chip Dependent.
Interrupt
C[7:0]F
PAOVF
PAOVI
TOF
Resets
Interrupts
Channel [7:0] Interrupt (C[7:0]F)
Pulse Accumulator Input Interrupt (PAOVI)
Pulse Accumulator Overflow Interrupt (PAOVF)
The timer prescaler generates the divided-by-64 clock. If the timer is not
active, there is no divided-by-64 clock.
Offset
(1)
—
—
—
—
Vector
—
—
—
—
1
S12P-Family Reference Manual, Rev. 1.13
Table 14-24. TIM16B8CV1 Interrupts
Priority
—
—
—
—
1
Timer Channel 7–0
Pulse Accumulator
Pulse Accumulator
Timer Overflow
NOTE
Overflow
Section 14.3, “Memory Map and Register Definition”
Source
Input
Active high pulse accumulator input interrupt
Timer Module (TIM16B8CV2) Block Description
Active high timer channel interrupts 7–0
Pulse accumulator overflow interrupt
Table 14-24
Timer Overflow interrupt
Description
lists the interrupts
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