S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 222

• Manufacturer Part Number: S9S12P64J0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit 64K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P64J0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12P
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.15 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3.2.14
The CPMULVCTL register allows the configuration of the low-voltage detect features.
Read: Anytime
Write: LVIE and LVIF are write anytime, LVDS is read only
222
0x02F1
The Reset state of LVDS and LVIF depends on the external supplied VDDA level
Reset
LVDS
Field
LVIE
LVIF
2
1
0
W
R
Low-Voltage Detect Status Bit — This read-only status bit reflects the voltage level on VDDA. Writes have no
effect.
0 Input voltage V
1 Input voltage V
Low-Voltage Interrupt Enable Bit
0 Interrupt request is disabled.
1 Interrupt will be requested whenever LVIF is set.
Low-Voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by
writing a 1. Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0 No change in LVDS bit.
1 LVDS bit has changed.
Low Voltage Control Register (CPMULVCTL)
0
0
7
= Unimplemented or Reserved
Figure 7-17. Low Voltage Control Register (CPMULVCTL)
0
0
6
DDA
DDA
Table 7-14. CPMULVCTL Field Descriptions
is above level V
is below level V
S12P-Family Reference Manual, Rev. 1.13
0
0
5
LVIA
LVID
and FPM.
or RPM.
0
0
4
Description
0
0
3
LVDS
U
2
Freescale Semiconductor
LVIE
0
1
LVIF
U
0