S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 212

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S9S12P64J0CFT

Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
S12 Clock, Reset and Power Management Unit (S12CPMU)
212
COPOSCSE
RTIOSCSEL
Field
PRE
PCE
3
2
1
0
L
RTI Enable During Pseudo Stop Bit — PRE enables the RTI during Pseudo Stop Mode.
0 RTI stops running during Pseudo Stop Mode.
1 RTI continues running during Pseudo Stop Mode if RTIOSCSEL=1.
Note: If PRE=0 or RTIOSCSEL=0 then the RTI will go static while Stop Mode is active. The RTI counter will not
COP Enable During Pseudo Stop Bit — PCE enables the COP during Pseudo Stop Mode.
0 COP stops running during Pseudo Stop Mode
1 COP continues running during Pseudo Stop Mode if COPOSCSEL=1
Note: If PCE=0 or COPOSCSEL=0 then the COP will go static while Stop Mode is active. The COP counter will
RTI Clock Select— RTIOSCSEL selects the clock source to the RTI. Either IRCCLK or OSCCLK. Changing the
RTIOSCSEL bit re-starts the RTI time-out period.
RTIOSCSEL can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the RTIOSCSEL bit.
0 RTI clock source is IRCCLK.
1 RTI clock source is OSCCLK.
COP Clock Select— COPOSCSEL selects the clock source to the COP. Either IRCCLK or OSCCLK. Changing
the COPOSCSEL bit re-starts the COP time-out period.
COPOSCSEL can only be set to 1, if UPOSC=1.
UPOSC= 0 clears the COPOSCSEL bit.
0 COP clock source is IRCCLK.
1 COP clock source is OSCCLK
be reset.
not be reset.
Table 7-5. CPMUCLKS Descriptions (continued)
S12P-Family Reference Manual, Rev. 1.13
Description
Freescale Semiconductor

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