S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 204

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S9S12P64J0CFT

Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
Addres
0x003A
0x003B
0x003C CPMUCOP
0x003D
0x003E
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039 CPMUCLKS
0x003F
0x02F0
0x02F1
0x02F2
S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3
This section provides a detailed description of all registers accessible in the S12CPMU.
7.3.1
The S12CPMU registers are shown in
204
s
CPMUTEST0
CPMUTEST1
RESERVED
RESERVED
CPMUFLG
CPMUPLL
CPMUINT
CPMURTI
POSTDIV
ARMCOP
REFDIV
APICTL
HTCTL
Memory Map and Registers
LVCTL
CPMU
CPMU
CPMU
CPMU
CPMU
CPMU
CPMU
SYNR
Name
Module Memory Map
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
APICLK
RTDEC
WCOP
RTIE
Bit 7
RTIF
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-3. CPMU Register Summary
S12P-Family Reference Manual, Rev. 1.13
RSBCK
PORF
PSTP
RTR6
Bit 6
6
0
0
0
0
0
0
0
0
0
Figure
WRTMASK
7-3.
RTR5
VSEL
LVRF
FM1
Bit 5
5
0
0
0
0
0
0
0
0
0
0
LOCKIE
LOCKIF
APIES
RTR4
FM0
Bit 4
4
0
0
0
0
0
0
0
0
APIEA
LOCK
RTR3
PRE
Bit 3
HTE
3
0
0
0
0
0
0
0
SYNDIV[5:0]
POSTDIV[4:0]
APIFE
HTDS
RTR2
LVDS
ILAF
PCE
CR2
Bit 2
2
0
0
0
0
0
REFDIV[3:0]
Freescale Semiconductor
OSCSEL
OSCIF
OSCIE
RTR1
HTIE
APIE
LVIE
CR1
Bit 1
RTI
1
0
0
0
0
OSCSEL
UPOSC
RTR0
HTIF
APIF
Bit 0
COP
CR0
Bit 0
LVIF
0
0
0
0
0

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