S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 99

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S9S12P64J0CFT

Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
1. Read: Anytime
1. Read: Anytime
2.3.62
2.3.63
Freescale Semiconductor
Address 0x0275
RDR1AD
Address 0x0276
PER0AD
Write: Anytime
Write: Anytime
Field
Field
Reset
Reset
7-0
1-0
W
W
R
R
RDR1AD7
Port AD reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port AD pull-up enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect.
1 Pull device enabled
0 Pull device disabled
Port AD Reduced Drive Register (RDR1AD)
Port AD Pull Up Enable Register (PER0AD)
0
0
0
7
7
RDR1AD6
Figure 2-60. Port AD Reduced Drive Register (RDR1AD)
Figure 2-61. Port AD Pull Up Enable Register (PER0AD)
0
0
0
6
6
Table 2-56. RDR1AD Register Field Descriptions
Table 2-57. PER0AD Register Field Descriptions
RDR1AD5
S12P-Family Reference Manual, Rev. 1.13
5
0
5
0
0
RDR1AD4
0
0
0
4
4
Description
Description
RDR1AD3
0
0
0
3
3
RDR1AD2
0
0
0
2
2
Port Integration Module (S12PPIMV1)
RDR1AD1
PER0AD1
Access: User read/write
Access: User read/write
0
0
1
1
RDR1AD0
PER0AD0
0
0
0
0
99
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