S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 487

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S9S12P64J0CFT

Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
14.3.2.10 Timer Interrupt Enable Register (TIE)
Read: Anytime
Write: Anytime.
14.3.2.11 Timer System Control Register 2 (TSCR2)
Read: Anytime
Write: Anytime.
Freescale Semiconductor
Module Base + 0x000C
Module Base + 0x000D
C7I:C0I
Reset
Reset
Field
7:0
W
W
R
R
Input Capture/Output Compare “x” Interrupt Enable — The bits in TIE correspond bit-for-bit with the bits in
the TFLG1 status register. If cleared, the corresponding flag is disabled from causing a hardware interrupt. If set,
the corresponding flag is enabled to cause a interrupt.
C7I
TOI
0
0
7
7
= Unimplemented or Reserved
C6I
Figure 14-19. Timer System Control Register 2 (TSCR2)
0
0
0
6
6
Figure 14-18. Timer Interrupt Enable Register (TIE)
S12P-Family Reference Manual, Rev. 1.13
Table 14-12. TIE Field Descriptions
C5I
0
0
0
5
5
C4I
0
0
0
4
4
Description
TCRE
C3I
0
0
3
3
Timer Module (TIM16B8CV2) Block Description
PR2
C2I
0
0
2
2
PR1
C1I
0
0
1
1
PR0
C0I
0
0
0
0
487

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