S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 634

• Manufacturer Part Number: S912XET512J3VALR
• Description: 16-bit Microcontrollers - MCU 16 BIT,512K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S912XET512J3VALR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12XE
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.3.1.1
634
Module Base + 0x00X0
Module Base + 0x00X1
ID[28:21]
ID[20:18]
ID[17:15]
Field
Field
SRR
IDE
7-0
7-5
2-0
4
3
Reset:
Reset:
W
W
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Substitute Remote Request — This fixed recessive bit is used only in extended format. It must be set to 1 by
the user for transmission buffers and is stored as received on the CAN bus for receive buffers.
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
IDR0–IDR3 for Extended Identifier Mapping
ID28
ID20
7
x
Figure 16-26. Identifier Register 0 (IDR0) — Extended Identifier Mapping
7
x
Figure 16-27. Identifier Register 1 (IDR1) — Extended Identifier Mapping
Table 16-27. IDR0 Register Field Descriptions — Extended
Table 16-28. IDR1 Register Field Descriptions — Extended
ID27
ID19
6
x
6
x
MC9S12XE-Family Reference Manual Rev. 1.25
ID26
ID18
5
x
5
x
SRR (=1)
ID25
4
x
4
x
Description
Description
IDE (=1)
ID24
x
x
3
3
ID23
ID17
2
x
2
x
Freescale Semiconductor
ID22
ID16
x
x
1
1
ID21
ID15
0
x
0
x