S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 720

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S912XET512J3VALR

Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET512J3VALR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low order CAEx bit. The high order CAEx bit has no effect.
Table 19-12
mode.
19.4.2.8
Table 19-13
or center aligned) and 8-bit (normal) or 16-bit (concatenation).
19.5
The reset state of each individual bit is listed within the
details the registers and their bit-fields. All special functions or modes which are initialized during or just
following reset are described within this section.
720
The 8-bit up/down counter is configured as an up counter out of reset.
All the channels are disabled and all the counters do not count.
Resets
summarizes the boundary conditions for the PWM regardless of the output mode (left aligned
is used to summarize which channels are used to set the various control bits when in 16-bit
1. Counter = $00 and does not count.
PWM Boundary Cases
(indicates no duty)
(indicates no duty)
CONxx
CON67
CON45
CON23
CON01
>= PWMPERx
>= PWMPERx
PWMDTYx
$00
$00
XX
XX
Table 19-12. 16-bit Concatenation Mode Summary
PWMEx
PWME7
PWME5
PWME3
PWME1
MC9S12XE-Family Reference Manual Rev. 1.25
Table 19-13. PWM Boundary Cases
(indicates no period)
(indicates no period)
PWMPERx
PPOLx
PPOL7
PPOL5
PPOL3
PPOL1
$00
>$00
>$00
$00
XX
XX
(1)
1
PCLKx
Section 19.3.2, “Register Descriptions”
PCLK7
PCLK5
PCLK3
PCLK1
PPOLx
1
0
1
0
1
0
CAEx
CAE7
CAE5
CAE3
CAE1
PWMx Output
Always high
Always high
Always high
Always low
Always low
Always low
Output
PWMx
PWM7
PWM5
PWM3
PWM1
Freescale Semiconductor
which

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