C8051T622-GMR Silicon Labs, C8051T622-GMR Datasheet - Page 85

• Manufacturer Part Number: C8051T622-GMR
• Description: 8-bit Microcontrollers - MCU USB-OTP-16K-QFN24
• Manufacturer: Silicon Labs

Specifications of C8051T622-GMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

SFR Definition 15.2. RSTSRC: Reset Source
SFR Address = 0xEF
Note: Do not use read-modify-write operations on this register
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
MEMERR EPROM Error Reset Flag.
WDTRSF Watchdog Timer Reset Flag. N/A
MCDRSF Missing Clock Detector
UNUSED Unused. Read = 0b. Write = don’t care
USBRSF USB Reset Flag
PINRSF
SWRSF
PORSF
Name
USBRSF
Varies
R/W
7
Software Reset Force and
Flag.
Enable and Flag.
Power-On / V
Reset Flag, and V
Reset Enable.
HW Pin Reset Flag.
MEMERR
Varies
R
6
Description
DD
Monitor
R/W
DD
5
0
monitor
C8051T622/3 and C8051T326/7
SWRSF
Varies
R/W
Rev. 1.1
Writing a 1 enables USB
as a reset source.
N/A
Writing a 1 forces a sys-
tem reset.
Writing a 1 enables the
Missing Clock Detector.
The MCD triggers a reset
if a missing clock condition
is detected.
Writing a 1 enables the
V
source.
Writing 1 to this bit
before the V
is enabled and stabilized
may cause a system
reset.
N/A
4
DD
monitor as a reset
WDTRSF
Varies
Write
R
3
DD
monitor
MCDRSF
Varies
R/W
2
Set to 1 if USB caused the
last reset.
Set to 1 if EPROM
read/write error caused
the last reset.
Set to 1 if last reset was
caused by a write to
SWRSF.
Set to 1 if Watchdog Timer
overflow caused the last
reset.
Set to 1 if Missing Clock
Detector timeout caused
the last reset.
Set to 1 anytime a power-
on or V
occurs.
When set to 1 all other
RSTSRC flags are inde-
terminate.
Set to 1 if RST pin caused
the last reset.
PORSF
Varies
R/W
DD
1
Read
monitor reset
PINRSF
Varies
R
0
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