MA240029 Microchip Technology, MA240029 Datasheet - Page 146

no-image

MA240029

Manufacturer Part Number
MA240029
Description
Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
Manufacturer
Microchip Technology
Datasheet

Specifications of MA240029

Rohs
yes
Product
Daughter Cards
Core
PIC
Description/function
Plug-in module
Interface Type
I2C, SPI
Tool Is For Evaluation Of
PIC24FJ128GA310
For Use With
Explorer 16 Development Board

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA240029
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24FJ128GA310 FAMILY
9.1
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSCI and
• Secondary Oscillator (SOSC) on the SOSCI and
• Fast Internal RC (FRC) Oscillator
• Low-Power Internal RC (LPRC) Oscillator
The primary oscillator and FRC sources have the
option of using the internal 4x PLL. The frequency of
the FRC clock source can optionally be reduced by the
programmable clock divider. The selected clock source
generates the processor and peripheral clock sources.
The processor clock source is divided by two to pro-
duce the internal instruction cycle clock, F
document, the instruction cycle clock is also denoted
by F
can be provided on the OSCO I/O pin for some
operating modes of the primary oscillator.
TABLE 9-1:
DS39996F-page 146
Fast RC Oscillator with Postscaler
(FRCDIV)
(Reserved)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator
(SOSC)
Primary Oscillator (XT) with PLL
Module (XTPLL)
Primary Oscillator (EC) with PLL
Module (ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL Module
(FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
OSCO pins
SOSCO pins
OSC
2:
/2. The internal instruction cycle clock, F
CPU Clocking Scheme
Oscillator Mode
OSCO pin function is determined by the OSCIOFCN Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Oscillator Source
CY
Secondary
Primary
Primary
Primary
Primary
Primary
. In this
Internal
Internal
Internal
Internal
Internal
OSC
/2,
9.2
The oscillator source (and operating mode) that is
used at a device Power-on Reset event is selected
using Configuration bit settings. The Oscillator
Configuration
Configuration registers in the program memory (refer
to
details). The Primary Oscillator Configuration bits,
POSCMD<1:0> (Configuration Word 2<1:0>), and
the Initial Oscillator Select Configuration bits,
FNOSC<2:0> (Configuration Word 2<10:8>), select
the oscillator source that is used at a Power-on Reset.
The FRC Primary Oscillator (FRCDIV) with postscaler
is the default (unprogrammed) selection. The second-
ary oscillator, or one of the internal oscillators, may be
chosen by programming these bit locations.
The Configuration bits allow users to choose between
the various clock modes, shown in
9.2.1
The
Word 2<7:6>) are used to jointly configure device clock
switching and the Fail-Safe Clock Monitor (FSCM).
Clock switching is enabled only when FCKSM1 is
programmed (‘0’). The FSCM is enabled only when the
FCKSM<1:0> bits are both programmed (‘00’).
POSCMD<1:0>
Section 29.0 “Special Features”
FCKSM
11
xx
11
11
01
00
10
01
00
11
11
Initial Configuration on POR
CLOCK SWITCHING MODE
CONFIGURATION BITS
bit
Configuration
 2010-2011 Microchip Technology Inc.
settings
FNOSC<2:0>
111
110
101
100
011
011
010
010
010
001
000
are
bits
Table
located
(Configuration
9-1.
for further
1,
1
1
1
1
1
2
Note
in
the

Related parts for MA240029