MA240029 Microchip Technology, MA240029 Datasheet - Page 252

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

PIC24FJ128GA310 FAMILY
REGISTER 19-3:
DS39996F-page 252
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
CHODIS
CLODIS
R/W-x
R/W-0
Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
CHODIS: Modulator High Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by CH<3:0>) is disabled
0 = Output signal driving the peripheral output pin is enabled
CHPOL: Modulator High Carrier Polarity Select bit
1 = Selected high carrier signal is inverted
0 = Selected high carrier signal is not inverted
CHSYNC: Modulator High Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the high carrier before allowing a switch to the low carrier
0 = Modulator output is not synchronized to the high time carrier signal
Unimplemented: Read as ‘0’
CH<3:0> Modulator Data High Carrier Selection bits
1111
. . .
1011
1010 = Output Compare/PWM Module 7 output
1001 = Output Compare/PWM Module 6 output
1000 = Output Compare/PWM Module 5 output
0111 = Output Compare/PWM Module 4 output
0110 = Output Compare/PWM Module 3 output
0101 = Output Compare/PWM Module 2 output
0100 = Output Compare/PWM Module 1 output
0011 = Reference clock (REFO) output
0010 = Input on MDCIN2 pin
0001 = Input on MDCIN1 pin
0000 = V
CLODIS: Modulator Low Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by CL<3:0>) is disabled
0 = Output signal driving the peripheral output pin is enabled
CLPOL: Modulator Low Carrier Polarity Select bit
1 = Selected low carrier signal is inverted
0 = Selected low carrier signal is not inverted
CLSYNC: Modulator Low Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the low carrier before allowing a switch to the high carrier
0 = Modulator output is not synchronized to the low time carrier signal
Unimplemented: Read as ‘0’
CL<3:0> Modulator Data Low Carrier Selection bits
Bit settings are identical to those for CH<3:0>.
CHPOL
CLPOL
R/W-x
R/W-x
= Reserved
MDCAR: MODULATOR CARRIER CONTROL REGISTER
SS
W = Writable bit
‘1’ = Bit is set
CHSYNC
CLSYNC
R/W-x
R/W-x
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CH3
CL3
R/W-x
R/W-x
(1)
(1)
(1)
(1)
CH2
R/W-x
R/W-x
CL2
(1)
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(1)
(1)
(1)
x = Bit is unknown
CH1
R/W-x
R/W-x
CL1
(1)
(1)
CH0
CL0
R/W-x
R/W-x
(1)
(1)
bit 8
bit 0