MA240029 Microchip Technology, MA240029 Datasheet - Page 161

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

When the RTCC is enabled, it continues to operate with
the same clock source (SOSC or LPRC) that was
selected prior to entering V
vision to switch to a lower power clock source after the
mode switch.
Since the loss of V
is recommended that the contents of the Deep Sleep
Semaphore registers be loaded with the data to be
retained at an early point in code execution.
10.5.1
By disabling RTCC operation during V
consumption is reduced to the lowest of all
power-saving modes. In this mode, only the Deep
Sleep Semaphore registers are maintained.
10.5.2
When V
matically wakes. Wake-up occurs with a POR, after
which the device starts executing code from the Reset
vector. All SFRs, except the Deep Sleep Semaphores
and RTCC registers are reset to their POR values. If
the RTCC was not configured to run during V
it will remain disabled and RTCC will not run. Wake-up
timing is similar to that for a normal POR.
To differentiate a wake-up from V
POR states, check the VBAT status bit (RCON2<0>). If
this bit is set while the device is starting to execute the
code from Reset vector, it indicates that there has been
an exit from V
V
captured.
If a POR occurs without a power source connected to
the V
bit is set on a POR, it indicates that a battery needs to
be connected to the V
In addition, if the V
level needed for Deep Sleep Semaphore operation
while in V
drained), the VBPOR bit will be set. VBPOR is also set
when the microcontroller is powered up the very first
time, even if power is supplied to V
 2010-2011 Microchip Technology Inc.
BAT
BAT
bit to ensure that future V
DD
pin, the VBPOR bit (RCON2<1>) is set. If this
is restored to a device in V
WAKE-UP FROM V
BAT
V
BAT
BAT
mode (e.g., the battery has been
mode. The application must clear the
MODE WITH NO RTCC
DD
BAT
is usually an unforeseen event, it
BAT
power source falls below the
pin.
BAT
BAT
mode. There is no pro-
BAT
BAT
wake-up events are
BAT
BAT
BAT
mode from other
MODES
.
mode, it auto-
mode, power
BAT
PIC24FJ128GA310 FAMILY
mode,
With VBPOR set, the user should clear it, and the next
time, this bit will only set when V
pin has gone below level (0.4V-0.6V).
10.5.3
All I/O pins should be maintained at V
pins should be given V
Ratings”) during V
the SOSCI and SOSCO pins, which maintain their states
if the secondary oscillator is being used as the RTCC
clock source. It is the user’s responsibility to restore the
I/O pins to their proper states, using the TRIS and LAT
bits, once V
10.5.4
As with Deep Sleep mode, all SFRs are reset to their
POR values after V
Deep Sleep Semaphore registers are preserved. Appli-
cations which require critical data to be saved should
save it in DSGPR0 and DSGPR1.
The BOR should be enabled for the reliable operation
of the V
Note:
BAT
.
DD
I/O PINS DURING V
SAVING CONTEXT DATA WITH THE
DSGPRn REGISTERS
If the V
recommendation is to connect the V
pin to V
When the V
to the battery), as well as when it is not
used, it is always recommended to
connect a 0.1 µF capacitor from the V
pin to ground. The capacitor should be
located very close to the V
has been restored.
BAT
DD
DD
BAT
DD
.
mode. The only exceptions are
BAT
has been restored. Only the
(refer to
mode is not used, the
mode is used (connected
“Absolute Maximum
DD
BAT
DS39996F-page 161
= 0 and the V
BAT
SS
MODES
level; no I/O
pin.
BAT
BAT
BAT