MA240029 Microchip Technology, MA240029 Datasheet - Page 58

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

TABLE 4-23:
DMACON
DMABUF
DMAL
DMAH
DMACH0
DMAINT0
DMASRC0
DMADST0
DMACNT0
DMACH1
DMAINT1
DMASRC1
DMADST1
DMACNT1
DMACH2
DMAINT2
DMASRC2
DMADST2
DMACNT2
DMACH3
DMAINT3
DMASRC3
DMADST3
DMACNT3
DMACH4
DMAINT4
DMASRC4
DMADST4
DMACNT4
DMACH5
DMAINT5
DMASRC5
DMADST5
DMACNT5
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File Name
038C
039C
03AA
03AC
03AE
03BA
03BC
03BE
03C0
03C2
Addr
0380
0382
0384
0386
0388
038A
038E
0390
0392
0394
0396
0398
039A
039E
03A0
03A2
03A4
03A6
03A8
03B0
03B2
03B4
03B6
03B8
DMA REGISTER MAP
DBUFWF
DBUFWF
DBUFWF
DBUFWF
DBUFWF
DBUFWF
DMAEN
Bit 15
—
—
—
—
—
—
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
—
CHSEL5
CHSEL5
CHSEL5
CHSEL5
CHSEL5
Bit 13
—
—
—
—
—
—
—
—
CHSEL4
CHSEL4
CHSEL4
CHSEL4
CHSEL4
CHSEL4
Bit 12
—
—
—
—
—
—
—
CHSEL3
CHSEL3
CHSEL3
CHSEL3
CHSEL3
CHSEL3
Bit 11
—
—
—
—
—
—
—
CHSEL2
CHSEL2
CHSEL2
CHSEL2
CHSEL2
CHSEL2
NULLW
NULLW
NULLW
NULLW
NULLW
NULLW
Bit 10
—
RELOAD
RELOAD
RELOAD
RELOAD
RELOAD
RELOAD
CHSEL1
CHSEL1
CHSEL1
CHSEL1
CHSEL1
CHSEL1
Bit 9
DMA Channel 0 Destination Address
DMA Channel 1 Destination Address
DMA Channel 2 Destination Address
DMA Channel 3 Destination Address
DMA Channel 4 Destination Address
DMA Channel 5 Destination Address
—
DMA Channel 0 Transaction Count
DMA Channel 1 Transaction Count
DMA Channel 2 Transaction Count
DMA Channel 3 Transaction Count
DMA Channel 4 Transaction Count
DMA Channel 5 Transaction Count
DMA Channel 0 Source Address
DMA Channel 1 Source Address
DMA Channel 2 Source Address
DMA Channel 3 Source Address
DMA Channel 4 Source Address
DMA Channel 5 Source Address
DMA Transfer Data Buffer
DMA High Address Limit
DMA Low Address Limit
CHSEL0
CHSEL0
CHSEL0
CHSEL0
CHSEL0
CHSEL0
CHREQ
CHREQ
CHREQ
CHREQ
CHREQ
CHREQ
Bit 8
—
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
SAMODE1 SAMODE0 DAMODE1 DAMODE0 TRMODE1 TRMODE0
HIGHIF
HIGHIF
HIGHIF
HIGHIF
HIGHIF
HIGHIF
Bit 7
—
LOWIF
LOWIF
LOWIF
LOWIF
LOWIF
LOWIF
Bit 6
—
DONEIF
DONEIF
DONEIF
DONEIF
DONEIF
DONEIF
Bit 5
—
HALFIF
HALFIF
HALFIF
HALFIF
HALFIF
HALFIF
Bit 4
—
OVRUNIF
OVRUNIF
OVRUNIF
OVRUNIF
OVRUNIF
OVRUNIF
Bit 3
—
Bit 2
—
—
—
—
—
—
—
BYTE
BYTE
BYTE
BYTE
BYTE
BYTE
Bit 1
—
—
—
—
—
—
—
PRSSEL
HALFEN
HALFEN
HALFEN
HALFEN
HALFEN
HALFEN
CHEN
CHEN
CHEN
CHEN
CHEN
CHEN
Bit 0
Resets
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
All