MA240029 Microchip Technology, MA240029 Datasheet - Page 68

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

PIC24FJ128GA310 FAMILY
TABLE 4-36:
4.2.6
Apart from its use as a working register, the W15
register in PIC24F devices is also used as a Software
Stack Pointer (SSP). The pointer always points to the
first available free word and grows from lower to higher
addresses. It pre-decrements for stack pops and
post-increments for stack pushes, as shown in
Figure
instruction, the MSB of the PC is zero-extended before
the push, ensuring that the MSB is always clear.
The Stack Pointer Limit Value register (SPLIM), associ-
ated with the Stack Pointer, sets an upper address
boundary for the stack. SPLIM is uninitialized at Reset.
As is the case for the Stack Pointer, SPLIM<0> is
forced to ‘0’ as all stack operations must be
word-aligned. Whenever an EA is generated using
W15 as a source or destination pointer, the resulting
address is compared with the value in SPLIM. If the
contents of the Stack Pointer (W15) and the SPLIM reg-
ister are equal, and a push operation is performed, a
stack error trap will not occur. The stack error trap will
occur on a subsequent push operation. Thus, for
DS39996F-page 68
Note 1:
(Data Space Read
Note:
Register)
DSRPAG
2:
3:
4-7. Note that for a PC push during any CALL
1FFh
001h
002h
003h
000h
x
(1)
•
•
•
•
•
If the source/destination address is below 8000h, the DSRPAG and DSWPAG registers are not considered.
This data space can also be accessed by Direct Addressing.
When the source/destination address is above 8000h and DSRPAG/DSWPAG are ‘0’, an address error
trap will occur.
SOFTWARE STACK
A PC push during exception processing
will concatenate the SRL register to the
MSB of the PC prior to the push.
EDS MEMORY ADDRESS WITH DIFFERENT PAGES AND ADDRESSES
(Data Space Write
DSWPAG
Register)
1FFh
001h
002h
003h
000h
x
(1)
•
•
•
•
•
Source/Destination
0000h to 1FFFh
2000h to 7FFFh
8000h to FFFFh
Address while
Addressing
Indirect
example, if it is desirable to cause a stack error trap
when the stack grows beyond address 2000h in RAM,
initialize the SPLIM with the value, 1FFEh.
Similarly, a Stack Pointer underflow (stack error) trap is
generated when the Stack Pointer address is found to
be less than 0800h. This prevents the stack from
interfering with the SFR space.
A write to the SPLIM register should not be immediately
followed by an indirect read operation using W15.
FIGURE 4-7:
0000h
Pointing to EDS
Invalid Address
010000h to
FF8000h to
000000h to
002000h to
008000h to
018000h to
24-Bit EA
FFFFFEh
001FFFh
007FFFh
00FFFEh
017FFEh
0187FEh
15
000000000
•
•
•
•
<
Free Word
PC<15:0>
 2010-2011 Microchip Technology Inc.
PC<22:16>
CALL STACK FRAME
>
Near data space
EPMP memory space
Address error trap
0
Comment
POP : [--W15]
PUSH : [W15++]
W15 (
W15 (
before
after
(2)
(3)
CALL)
CALL)