MA240029 Microchip Technology, MA240029 Datasheet - Page 315

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

25.0
The triple comparator module provides three dual input
comparators. The inputs to the comparator can be
configured to use any one of five external analog inputs
(CxINA, CxINB, CxINC, CxIND and V
FIGURE 25-1:
 2010-2011 Microchip Technology Inc.
Note:
Note 1: Refer to the CVRCON register
CCH<1:0>
C
C
C
V
V
V
V
CVREFM<1:0>
C
V
CV
CVREFP
CREF
BG
BG
BG
REF
REF
X
X
X
X
TRIPLE COMPARATOR
MODULE
INB
INC
IND
INA
REF
/2
/6
+
+
Section
Module” (DS39734). The information in
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
this data sheet supersedes the information
in the FRM.
(1)
(1)
46.
Family
TRIPLE COMPARATOR MODULE BLOCK DIAGRAM
00
10
11
01
0
1
Select
Logic
Input
“Scalable
00
01
10
11
0
1
Reference
+
-
V
V
V
V
V
V
IN
IN
IN
IN
Comparator
REF
IN
IN
-
+
-
+
-
+
(Register
+) and a
Manual”,
C1
C2
C3
PIC24FJ128GA310 FAMILY
26-1) for bit details.
EVPOL<1:0>
CPOL
EVPOL<1:0>
CPOL
EVPOL<1:0>
CPOL
voltage reference input from one of the internal band
gap references or the comparator voltage reference
generator (V
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals ‘1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module in shown in
Figure
comparator configurations are shown in
Each comparator has its own control register,
CMxCON
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register
Trigger/Interrupt
Trigger/Interrupt
25-1. Diagrams of the possible individual
Trigger/Interrupt
25-2).
(Register
Logic
Logic
Logic
BG
, V
BG
25-1), for enabling and configuring
/2, V
BG
COE
COE
COE
/6 and CV
CEVT
COUT
CEVT
COUT
CEVT
COUT
DS39996F-page 315
REF
C1OUT
Figure
C2OUT
C3OUT
).
Pin
Pin
Pin
25-2.