MA240029 Microchip Technology, MA240029 Datasheet - Page 243

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

18.2
1.
2.
3.
4.
5.
6.
18.3
1.
2.
3.
4.
5.
6.
18.4
The following sequence will send a message frame
header, made up of a Break, followed by an auto-baud
Sync byte.
1.
2.
3.
4.
5.
 2010-2011 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt,
two cycles after being set).
Write a data byte to the lower byte of the
UxTXREG word. The value will be immediately
transferred to the Transmit Shift Register (TSR)
and the serial bit stream will start shifting out
with the next rising edge of the baud clock.
Alternatively, the data byte may be transferred
while UTXEN = 0 and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
A transmit interrupt will be generated as per
interrupt control bit, UTXISELx.
Set up the UART (as described in
“Transmitting in 8-Bit Data
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write UxTXREG as a 16-bit value only.
A word write to UxTXREG triggers the transfer
of the 9-bit data to the TSR. The serial bit stream
will start shifting out with the first rising edge of
the baud clock.
A transmit interrupt will be generated as per the
setting of control bit, UTXISELx.
Configure the UART for the desired mode.
Set UTXEN and UTXBRK to set up the Break
character.
Load the UxTXREG with a dummy character to
initiate transmission (value is ignored).
Write ‘55h’ to UxTXREG; this loads the Sync
character into the transmit FIFO.
After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
Transmitting in 8-Bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
UxBRG register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-Bit Data Mode
Break and Sync Transmit
Sequence
Mode”).
Section 18.2
PIC24FJ128GA310 FAMILY
18.5
1.
2.
3.
4.
5.
The act of reading the UxRXREG character will move
the next character to the top of the receive FIFO,
including a new set of PERR and FERR values.
18.6
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled pins that are
associated with the UART module. These two pins
allow the UART to operate in Simplex and Flow Control
mode. They are implemented to control the transmis-
sion and reception between the Data Terminal
Equipment (DTE). The UEN<1:0> bits in the UxMODE
register configure these pins.
18.7
The UART module provides two types of infrared UART
support: one is the IrDA clock output to support an
external IrDA encoder and decoder device (legacy
module support), and the other is the full implementa-
tion of the IrDA encoder and decoder. Note that
because the IrDA modes require a 16x baud clock, they
will only work when the BRGH bit (UxMODE<3>) is ‘0’.
18.7.1
To support external IrDA encoder and decoder devices,
the BCLKx pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLKx pin will output the 16x
baud clock if the UART module is enabled. It can be
used to support the IrDA codec chip.
18.7.2
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit (UxMODE<12>). When enabled
(IREN = 1), the receive pin (UxRX) acts as the input
from the infrared receiver. The transmit pin (UxTX) acts
as the output to the infrared transmitter.
Set up the UART (as described in
“Transmitting in 8-Bit Data
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bit, URXISELx.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read UxRXREG.
Receiving in 8-Bit or 9-Bit Data
Mode
Operation of UxCTS and UxRTS
Control Pins
Infrared Support
IrDA CLOCK OUTPUT FOR
EXTERNAL IrDA SUPPORT
BUILT-IN IrDA ENCODER AND
DECODER
Mode”).
DS39996F-page 243
Section 18.2