MA240029 Microchip Technology, MA240029 Datasheet - Page 333

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

29.0
PIC24FJ128GA310 family devices include several
features intended to maximize application flexibility and
reliability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™
• In-Circuit Emulation
29.1
The Configuration bits can be programmed (read as ‘0’),
or left unprogrammed (read as ‘1’), to select various
device configurations. These bits are mapped starting at
program memory location, F80000h. A detailed explana-
tion of the various bit functions is provided in
Register 29-1
Note that address, F80000h, is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh) which can only be
accessed using table reads and table writes.
TABLE 29-1:
 2010-2011 Microchip Technology Inc.
PIC24FJ64GA3XX
PIC24FJ128GA3XX
Note:
SPECIAL FEATURES
Configuration Bits
Device
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
following sections of the “PIC24F Family
Reference Manual”. The information in this
data sheet supersedes the information in
the FRMs.
• Section 9. “Watchdog Timer (WDT)”
• Section 32. “High-Level Device
• Section 33. “Programming and
(DS39697)
Integration” (DS39719)
Diagnostics” (DS39716)
through
FLASH CONFIGURATION WORD LOCATIONS FOR PIC24FJ128GA310 FAMILY
DEVICES
Register
29-6.
157FEh
ABFEh
1
PIC24FJ128GA310 FAMILY
Configuration Word Addresses
157FCh
ABFCh
2
29.1.1
In PIC24FJ128GA310 family devices, the configuration
bytes are implemented as volatile memory. This means
that configuration data must be programmed each time
the device is powered up. Configuration data is stored
in the three words at the top of the on-chip program
memory space, known as the Flash Configuration
Words. Their specific locations are shown in
Table
actual device Configuration bits, whose actual
locations are distributed among several locations in
configuration space. The configuration data is automat-
ically loaded from the Flash Configuration Words to the
proper Configuration registers during device Resets.
When creating applications for these devices, users
should always specifically allocate the location of the
Flash Configuration Word for configuration data. This is
to make certain that program code is not stored in this
address when the code is compiled.
The upper byte of all Flash Configuration Words in pro-
gram memory should always be ‘0000 0000’. This
makes them appear to be NOP instructions in the
remote event that their locations are ever executed by
accident. Since Configuration bits are not implemented
in the corresponding locations, writing ‘0’s to these
locations has no effect on device operation.
Note:
Note:
29-1. These are packed representations of the
CONSIDERATIONS FOR
CONFIGURING PIC24FJ128GA310
FAMILY DEVICES
Configuration data is reloaded on all types
of device Resets.
Performing a page erase operation on the
last page of program memory clears the
Flash Configuration Words, enabling code
protection as a result. Therefore, users
should avoid performing page erase
operations on the last page of program
memory.
157FAh
ABFAh
3
DS39996F-page 333
157F8h
ABF8h
4