MA240029 Microchip Technology, MA240029 Datasheet - Page 86

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

process is:
PIC24FJ128GA310 FAMILY
6.6.1
The user can program one row of Flash program memory
at a time. To do this, it is necessary to erase the 8-row
erase block containing the desired row. The general
1.
2.
3.
EXAMPLE 6-1:
DS39996F-page 86
; Set up NVMCON for block erase operation
; Init pointer to row to be ERASED
Read
(512 instructions) and store in data RAM.
Update the program data in RAM with the
desired new data.
Erase the block (see
a)
b)
c)
d)
e)
MOV
MOV
MOV
MOV
MOV
TBLWTL W0, [W0]
DISI
MOV.B #0x55, W0
MOV
MOV.B #0xAA, W1 ;
MOV
BSET
NOP
NOP
Set the NVMOP bits (NVMCON<3:0>) to
‘0010’ to configure for block erase. Set the
ERASE
(NVMCON<14>) bits.
Write the starting address of the block to be
erased into the TBLPAG and W registers.
Write 55h to NVMKEY.
Write AAh to NVMKEY.
Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the dura-
tion of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
eight
#0x4042, W0 ;
W0, NVMCON
#tblpage(PROG_ADDR), W0
W0, TBLPAG
#tbloffset(PROG_ADDR), W0
#5
W0, NVMKEY
W1, NVMKEY
NVMCON, #WR
(NVMCON<6>)
rows
ERASING A PROGRAM MEMORY BLOCK (ASSEMBLY LANGUAGE CODE)
Example
of
program
6-1):
and
memory
WREN
; Initialize NVMCON
;
; Initialize Program Memory (PM) Page Boundary SFR
; Initialize in-page EA<15:0> pointer
; Set base address of erase block
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
4.
5.
6.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as shown
in
Example
Write the first 64 instructions from data RAM into
the program memory buffers (see
Write the program block to Flash memory:
a)
b)
c)
d)
Repeat Steps 4 and 5, using the next available
64 instructions from the block in data RAM by
incrementing the value in TBLPAG, until all
512 instructions are written back to Flash
memory.
Set the NVMOP bits to ‘0001’ to configure
for row programming. Clear the ERASE bit
and set the WREN bit.
Write 55h to NVMKEY.
Write AAh to NVMKEY.
Set the WR bit. The programming cycle
begins and the CPU stalls for the duration
of the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
6-4.
 2010-2011 Microchip Technology Inc.
Example
6-3).