LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 117

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
1
1
2.3.67
2.3.68
Freescale Semiconductor
DDR0AD0
Function
Address 0x0271
Address 0x0272
PT1AD0
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Read: Anytime.
Write: Anytime.
Altern.
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
DDR0AD07
PT1AD07
Port AD0 general purpose input/output data—Data Register, ATD AN analog input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port AD0 data direction—
This bit determines whether the associated pin is an input or output.
To use the digital input function the ATD Digital Input Enable Register (ATD0DIEN) has to be set to logic level “1”.
1 Associated pin configured as output
0 Associated pin configured as input
Port AD0 Data Register 1 (PT1AD0)
Port AD0 Data Direction Register 0 (DDR0AD0)
AN7
0
0
7
7
DDR0AD06
PT1AD06
Figure 2-66. Port AD0 Data Direction Register 0 (DDR0AD0)
AN6
0
0
6
6
Table 2-65. DDR0AD0 Register Field Descriptions
Figure 2-65. Port AD0 Data Register 1 (PT1AD0)
Table 2-64. PT1AD0 Register Field Descriptions
DDR0AD05
S12XS Family Reference Manual, Rev. 1.11
PT1AD05
AN5
0
0
5
5
DDR0AD04
PT1AD04
AN4
0
0
4
4
Description
Description
DDR0AD03
PT1AD03
AN3
3
0
3
0
DDR0AD02
PT1AD02
AN2
0
0
Port Integration Module (S12XSPIMV1)
2
2
DDR0AD01
PT1AD01
Access: User read/write
Access: User read/write
AN1
0
0
1
1
DDR0AD00
PT1AD00
AN0
0
0
0
0
117
1
1

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