LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 91

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

1
2.3.26
Freescale Semiconductor
Function
Address 0x0248
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Altern.
Field
Reset
PTS
PTS
PTS
PTS
7
6
5
4
W
R
Port S general purpose input/output data—Data Register, SPI0 SS input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SPI0 SCK input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SPI0 MOSI input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SPI0 MISO input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
PTS7
Port S Data Register (PTS)
SS0
0
7
SCK0
PTS6
0
6
Table 2-23. PTS Register Field Descriptions
Figure 2-24. Port S Data Register (PTS)
S12XS Family Reference Manual, Rev. 1.11
MOSI0
PTS5
0
5
MISO0
PTS4
0
4
Description
TXD1
PTS3
3
0
RXD1
PTS2
0
Port Integration Module (S12XSPIMV1)
2
Access: User read/write
TXD0
PTS1
0
1
RXD0
PTS0
0
0
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