LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 354

• Manufacturer Part Number: LFDAS12XSDT
• Description: HARDWARE MC9S12XS 52-PIN
• Manufacturer: Freescale Semiconductor

Specifications of LFDAS12XSDT

• Module/board Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: -

Periodic Interrupt Timer (S12PIT24B4CV1)
12.3.0.2
Read: Anytime
Write: Anytime
12.3.0.3
Read: Anytime
Write: Anytime
354
Module Base + 0x0001
Module Base + 0x0002
PFLT[3:0]
PCE[3:0]
Reset
Reset
Field
Field
3:0
3:0
W
W
R
R
PIT Force Load Bits for Timer 3-0 — These bits have only an effect if the corresponding timer channel (PCE
set) is enabled and if the PIT module is enabled (PITE set). Writing a one into a PFLT bit loads the corresponding
16-bit timer load register into the 16-bit timer down-counter. Writing a zero has no effect. Reading these bits will
always return zero.
PIT Enable Bits for Timer Channel 3:0 — These bits enable the PIT channels 3-0. If PCE is cleared, the PIT
channel is disabled and the corresponding flag bit in the PITTF register is cleared. When PCE is set, and if the
PIT module is enabled (PITE = 1) the 16-bit timer counter is loaded with the start count value and starts down-
counting.
0 The corresponding PIT channel is disabled.
1 The corresponding PIT channel is enabled.
PIT Force Load Timer Register (PITFLT)
PIT Channel Enable Register (PITCE)
0
0
0
0
7
7
0
0
0
0
6
6
Figure 12-4. PIT Force Load Timer Register (PITFLT)
Figure 12-5. PIT Channel Enable Register (PITCE)
S12XS Family Reference Manual, Rev. 1.11
Table 12-3. PITFLT Field Descriptions
Table 12-4. PITCE Field Descriptions
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
PFLT3
PCE3
0
0
0
3
3
PFLT2
PCE2
0
0
0
2
2
Freescale Semiconductor
PFLT1
PCE1
0
0
0
1
1
PFLT0
PCE0
0
0
0
0
0