LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 97

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Freescale Semiconductor
Field
PTM
PTM
PTM
PTM
PTM
4
3
2
1
0
Port M general purpose input/output data—Data Register, routed SPI0 MOSI input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, routed SPI0 SS input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, routed SPI0 MISO input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, CAN0 TXCAN output, SCI1 TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, CAN0 RXCAN input, SCI1 RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The SPI0 function takes precedence over the general purpose I/O function if enabled.
• The CAN0 function takes precedence over the general purpose I/O function if enabled.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
• The CAN0 function takes precedence over the general purpose I/O function if enabled.
• The SCI1 function takes precedence over the general purpose I/O function if enabled.
Table 2-30. PTM Register Field Descriptions (continued)
S12XS Family Reference Manual, Rev. 1.11
Description
Port Integration Module (S12XSPIMV1)
97

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