LFDAS12XSDT Freescale Semiconductor, LFDAS12XSDT Datasheet - Page 475

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LFDAS12XSDT

Manufacturer Part Number
LFDAS12XSDT
Description
HARDWARE MC9S12XS 52-PIN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFDAS12XSDT

Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Read: Anytime
Write: Anytime.
16.3.2.10 Timer Interrupt Enable Register (TIE)
Read: Anytime
Write: Anytime.
Freescale Semiconductor
Module Base + 0x000C
EDGnB
EDGnA
C7I:C0I
Reset
Field
Field
7:0
7:0
W
R
Input Capture Edge Control — These eight pairs of control bits configure the input capture edge detector
circuits.
Input Capture/Output Compare “x” Interrupt Enable — The bits in TIE correspond bit-for-bit with the bits in
the TFLG1 status register. If cleared, the corresponding flag is disabled from causing a hardware interrupt. If set,
the corresponding flag is enabled to cause a interrupt.
C7I
0
7
C6I
0
6
EDGnB
Figure 16-18. Timer Interrupt Enable Register (TIE)
Table 16-12. Edge Detector Circuit Configuration
0
0
1
1
Table 16-11. TCTL3/TCTL4 Field Descriptions
S12XS Family Reference Manual Rev. 1.11
Table 16-13. TIE Field Descriptions
C5I
EDGnA
0
5
0
1
0
1
Capture on any edge (rising or falling)
C4I
0
4
Capture on falling edges only
Capture on rising edges only
Description
Description
Capture disabled
Configuration
C3I
0
3
C2I
0
2
Timer Module (TIM16B8CV2)
C1I
0
1
C0I
0
0
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