C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 171

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

Table 16.1. Internal High Frequency Oscillator Electrical Characteristics
–40°C to +85°C unless otherwise specified.
16.2. Programmable Internal Low-Frequency (L-F) Oscillator
All C8051F36x devices include a programmable low-frequency internal oscillator, which is calibrated to a
nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can be changed to
divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR Definition 16.3).
Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output frequency.
Calibrated Internal Oscillator
Frequency
Internal Oscillator Supply
Current (from V
Power Supply Sensitivity
Temperature Sensitivity
External Clock Frequency
T
T
Bit 7:
Bit 6:
Bits 5:
Bits 4–2: RESERVED. Read = 000b. Must Write 000b.
Bits 1–0: IFCN1-0: Internal Oscillator Frequency Control Bits.
SFR Page:
SFR Address:
XCH
XCL
IOSCEN
R/W
Bit7
(External Clock Low Time)
(External Clock High Time)
Parameter
SUSPEND: Internal Oscillator Suspend Enable Bit.
00: Internal Oscillator is divided by 8. (default)
01: Internal Oscillator is divided by 4.
10: Internal Oscillator is divided by 2.
11: Internal Oscillator is divided by 1.
IOSCEN: Internal Oscillator Enable Bit.
0: Internal Oscillator Disabled.
1: Internal Oscillator Enabled.
IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator not running at programmed frequency.
1: Internal Oscillator running at programmed frequency.
Setting this bit to logic ‘1’ places the internal oscillator in SUSPEND mode. The internal
oscillator resumes operation when one of the SUSPEND mode awakening events occur.
F
0xB7
IFRDY
DD
SFR Definition 16.2. OSCICN: Internal Oscillator Control
Bit6
R
)
SUSPEND Reserved Reserved Reserved
R/W
Bit5
OSCICN.7 = 1
Constant Temperature
Constant Supply
Bit4
R
Conditions
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
R/W
Bit3
R/W
Bit2
Min
24
—
—
15
15
—
0
IFCN1
R/W
Bit1
24.5
0.12
Typ
450
60
—
—
—
IFCN0
R/W
Bit0
Max
600
25
30
—
—
—
—
11000000
Reset Value
ppm/°C
Units
MHz
MHz
%/V
µA
ns
ns
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